New class of hardware-Level fault-tolerant Quantum-Computing Devices 

[Submitted on 6 Jul 2022 (v1), last revised 7 Jul 2022 (this version, v2)]

Download PDF

Abstract: We present measurements and simulations of semiconductor-superconductor
heterostructure devices that are consistent with the observation of topological
superconductivity and Majorana zero modes. The devices are fabricated from
high-mobility two-dimensional electron gases in which quasi-one-dimensional
wires are defined by electrostatic gates. These devices enable measurements of
local and non-local transport properties and have been optimized via extensive
simulations for robustness against non-uniformity and disorder. Our main result
is that several devices, fabricated according to the design’s engineering
specifications, have passed the topological gap protocol defined in Pikulin
{it et al.} [arXiv:2103.12217]. This protocol is a stringent test composed of
a sequence of three-terminal local and non-local transport measurements
performed while varying the magnetic field, semiconductor electron density, and
junction transparencies. Passing the protocol indicates a high probability of
detection of a topological phase hosting Majorana zero modes. Our experimental
results are consistent with a quantum phase transition into a topological
superconducting phase that extends over several hundred millitesla in magnetic
field and several millivolts in gate voltage, corresponding to approximately
one hundred micro-electron-volts in Zeeman energy and chemical potential in the
semiconducting wire. These regions feature a closing and re-opening of the bulk
gap, with simultaneous zero-bias conductance peaks at {it both} ends of the
devices that withstand changes in the junction transparencies. The measured
maximum topological gaps in our devices are 20-$30,mu$eV. This demonstration
is a prerequisite for experiments involving fusion and braiding of Majorana
zero modes.